In either of these cases, a source of noise that caused one bit to be received incorrectly would invalidate the received byte, since the total number of '1' bits would be odd rather than even. In some cases, however, a sophisticated network may have device groups on a network that use different clock configurations. The CPHA bit determines whether data is valid on the leading or trailing edge of the clock. The SCK pin’s synchronous clock signal has configurable phase, polarity and baud rate so that it can interface to a variety of synchronous serial devices. Each RS232 driver uses inverting logic and implements a single-ended bipolar output voltage (that is, one signal that swings above and below ground). The RS232 protocol specifies the use of two separate grounds, a signal ground and a protective (or chassis) ground. Rather, the UART deduces the correct time to sample the incoming signal based on the start and stop bits in the signal itself. Rather, it relies on software handshaking via transmission of XON/XOFF characters (ascii 0x11 and 0x13, respectively) to coordinate data transfer and ensure that information is not lost when one of the communicating parties is busy. Many terminals and PCs, however, do rely on hardware handshaking to determine when the other party (in this case the PDQ Board) is ready to accept data.

The PDQ Board does not differentiate between these. The mating 10-pin connectors that join the H6 header of the PDQ Board to the H4 header of the Docking Panel are typically not accessed directly, and are not discussed in detail here. By connecting pairs of these handshaking signals together, the terminal or PC can be made to think that the PDQ Board is always ready to send and receive data. While these signals provide a data path, they do not provide hardware handshaking that allows the two communicating parties to let each other know when they are ready to send or receive data. The Serial 1 port is implemented with the 68HC11's on-chip hardware UART (Universal Asynchronous Receiver/Transmitter). There are surface-mount resistor pads on the Docking Panel to bring out the RS485 signals to the DB9 Serial 1 Connector. In that case you may terminate the lines with a series RC network comprising a 0.1 μF capacitor in series with a 120 Ω resistor.

RC termination - In some applications requiring low power you may not want to load the line with 120 Ω resistors at each end. The SCK pin clocks the serial A/D’s CLK input which causes the A/D’s conversion result to be transferred to the master via the MISO line. The GROUND line serves as a common voltage reference for the master and slave. You can implement the slave select lines by configuring Port A pins as outputs. When the keyword name is received by the Silence() routine running in the slave, the slave QScreen Controller executes RS485Transmit() to send an acknowledgment to the master (which should now be listening to the serial bus to accept the acknowledgment). The default serial routines used by the onboard kernel assume that full duplex communications are available, so you cannot use the RS485 protocol to program the controller. In this case, cable connections may be made to Serial 1 on either the 10-pin PDQ Board Serial Communications Header, or the Docking Panel’s 10-pin right-angle Serial Header, or the Docking Panel’s Serial1 DB-9 Connector. The following table shows the connection diagram for a standard 9-pin serial cable.

The pinout of the PDQ Board’s Communications Header (H2), Docking Panel’s Communications Header (H1), and the Docking Panel’s Communications DB-9 Connectors are shown in the following tables. The transmit and receive data signals carry the messages being communicated between the PDQ Board and the PC or terminal. RS232’s greatest benefit is its universality; most personal computers can use this protocol to send and receive serial data. The RS232 protocol specifies the use of two separate grounds, a signal ground and a protective (or "chassis") ground. Most computers conform to IBM PC AT-compatible RS232 interfaces which use 9-pin D-Type connectors, consequently the PDQ Board brings out its serial ports to two female 9-pin D-Type connectors on the Docking Panel. The PDQ Board’s transmit data signal /TxD1 (pin 2 on the 9-pin serial connector) is connected to the terminal’s receive data signal /RxD (pin 2 on its 9-pin connector). The QScreen Controller’s transmit data signal TxD1 (pin 2 on the 9-pin serial connector) is connected to the terminal’s receive data signal RxD (pin 2 on its 9-pin connector).

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